%0 Journal Article
%T Ant colony optimization approach for test scheduling of system on chip
%A CHEN Ling
%A PAN Zhong-liang
%A
CHEN Ling
%A PAN Zhongliang
%J 重庆邮电大学学报(自然科学版)
%D 2009
%I
%X It is necessary to perform the test of system on chip, the test scheduling determines the test start and finishing time of every core in the system on chip such that the overall test time is minimized. A new test scheduling approach based on chaotic ant colony algorithm is presented in this paper. The optimization model of test scheduling was studied, the model uses the information such as the scale of test sets of both cores and user defined logic. An approach based on chaotic ant colony algorithm was proposed to solve the optimization model of test scheduling. The test of signal integrity faults such as crosstalk were also investigated when performing the test scheduling. Experimental results on many circuits show that the proposed approach can be used to solve test scheduling problems.
%K system on chip
%K test scheduling
%K embedded core
%K ant colony algorithms
%K chaotic maps
测试时间
%K 片上系统
%K 调度方法
%K 蚁群优化
%K 日程安排
%K 蚁群算法
%K 优化模型
%K 用户自定义
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=01BA20E8BA813E1908F3698710BBFEFEE816345F465FEBA5&cid=96E6E851B5104576C2DD9FC1FBCB69EF&jid=5C2694A2E5629ECD6B59D7B28C6937AD&aid=C50B089595C03EFC635D69E1FE207B49&yid=DE12191FBD62783C&vid=659D3B06EBF534A7&iid=0B39A22176CE99FB&sid=D2742EEE6F4DF8FE&eid=CEC789B3C68C3BB3&journal_id=1673-825X&journal_name=重庆邮电大学学报(自然科学版)&referenced_num=0&reference_num=13