%0 Journal Article
%T Design and Implementation of FPGA-based TOE System<br>基于FPGA的TOE系统设计与实现
%A WANG Sheng SU Jin-shu
%A <br>王圣
%A 苏金树
%J 计算机科学
%D 2008
%I 
%X With the rapid increment of network bandwidth,the overheads of protocol on host have become the bottleneck of system performance.To increase the throughput efficiently and alleviate the burden of CPU,we design and implement a system based on FPGA(Field Programmable Gate Array) in detail,called TOE(TCP Offload Engine),which places the main part of TCP into hardware.Results show that TOE outperforms non-TOE in terms of throughput to TCP flows.
%K FPGA
%K TOE<br>设计
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=64A12D73428C8B8DBFB978D04DFEB3C1&aid=2184697A61A410F2F08842EB76986B07&yid=67289AFF6305E306&vid=6209D9E8050195F5&iid=5D311CA918CA9A03&sid=67969BA850333433&eid=228A710F49B6CE58&journal_id=1002-137X&journal_name=计算机科学&referenced_num=1&reference_num=8