%0 Journal Article
%T Design Analysis of 1 0Gbps Forwarding Engine with FPGA<br>基于FPGA实现的10Gbps高速转发引擎设计分析
%A LIU Qin-Rang
%A WU Jiang-Xing
%A <br>刘勤让
%A 邬江兴
%J 计算机科学
%D 2005
%I 
%X The 10Gbps forwarding engine is one of the most challenge task in terabit router design. In order to design a 10Gbps forwarding engine with FPGA, the transmission bandwidth requirement between each elements in FPGA, IP look-up time, header processing cycle number and the up-to-date development of FPGA are all analyzed in detail. So the number of fiber to provide enough transmission bandwidth is calculated, a fast IP look-up scheme is presented and a header processing module of parallel and pipeline structure is provided. Finally the implementing scheme of the 10Gbps forwarding engine is proposed.
%K FPGA
%K 10Gbps
%K Forwarding engine
%K Parallel
%K Pipedine<br>FPGA
%K 10Gbps
%K 转发引擎
%K 并行
%K 流水线
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=64A12D73428C8B8DBFB978D04DFEB3C1&aid=F8A93F3E1168AED4&yid=2DD7160C83D0ACED&vid=9971A5E270697F23&iid=B31275AF3241DB2D&sid=F3583C8E78166B9E&eid=BCA2697F357F2001&journal_id=1002-137X&journal_name=计算机科学&referenced_num=0&reference_num=11