%0 Journal Article
%T An Error Recoverable Structure Based on Complementary Logic and Alternating-Retry<br>An Error Recoverable Structure Based on Complementary Logic and Alternating- Retry
%A Jian-Hui Jiang
%A <br>Jian-Hui
%A Jiang
%J 计算机科学技术学报
%D 2005
%I 
%X Modern VLSI circuits provide adequate on-chip resources. So that online testing and retry integrated into a chip are absolutely necessary for system-on-a-chip technology. This paper firstly proposes a general online testing plus retrying structure. Obviously, although retry can mask transient or intermittent faults, it is useless for handling permanent faults generally. To solve this problem, this paper presents a novel dual modular redundancy (DMR) structure using complementary logic-alternating-complementary logic (CL-ACL) switching mode. During error-free operation, the CL-ACL structure operates by complementary logic mode. After an error is detected, it retries by alternating logic mode. If all errors belong to single or multiple temporary 0/1-error or stuck-at-error produced by one module, then these errors can be corrected effectively. The results obtained from the simulation validate the correctness of the CL-ACL structure. Analytic results show that the delay of the CL-ACL structure is dramatically less than that of a DMR structure using alternating-complementary logic mode.
%K error recovery
%K fault tolerance
%K complementary logic
%K alternating-retry
%K temporary error
%K stuck-at-error<br>VLSI
%K 超大规模集成电路
%K 芯片
%K 在线测试
%K 误差参数
%K 逻辑控制
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=F57FEF5FAEE544283F43708D560ABF1B&aid=3E3ACFC9A2453634B7A253EFEDE2E06E&yid=2DD7160C83D0ACED&vid=A04140E723CB732E&iid=B31275AF3241DB2D&sid=745C7FAEA69986C7&eid=117143DBED3B4430&journal_id=1000-9000&journal_name=计算机科学技术学报&referenced_num=0&reference_num=27