%0 Journal Article
%T Fast and low power TLB access mechanism with prediction buffer<br>基于预测缓存的低功耗TLB快速访问机制*
%A WU Shu-li
%A MENG Jian-yi
%A WANG Rong-hua
%A YAN Xiao-lang
%A GE Hai-tong
%A <br>武淑丽
%A 孟建熠
%A 王荣华
%A 严晓浪
%A 葛海通
%J 计算机应用研究
%D 2011
%I 
%X This paper proposed a fast and low power TLB access mechanism with prediction buffer based on memory access locality principle,and designed a two-level TLB structure implemented by SARM instead of CAM to achieve fast access of the full associated TLB.Between the two levels of the introduced TLB,an independent and hardware configurable prediction buffer was designed to dynamically predict the access sequences of the second level TLB,which could reduce its access penalty when the first level TLB missed and si...
%K MMU
%K two-level TLB
%K CAM
%K SRAM
%K prediction buffer
%K fast access
%K low-power<br>内存管理单元
%K 两级转换旁置缓冲器
%K 内容寻址存储器
%K 静态随机存储器
%K 预测缓存
%K 快速访问
%K 低功耗
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=A9D9BE08CDC44144BE8B5685705D3AED&aid=F32C7DEF351C88CCEA19544CA929A717&yid=9377ED8094509821&vid=D3E34374A0D77D7F&iid=5D311CA918CA9A03&sid=438B6D498F05EE69&eid=C7D3DB6F0D2A7B0F&journal_id=1001-3695&journal_name=计算机应用研究&referenced_num=0&reference_num=15