%0 Journal Article
%T Hardware implementation of branch predictor in 32 bit RISC microprocessor<br>32位RISC微处理器中分支预测器的硬件实现*
%A WANG Yong-wei
%A FAN Xiao-ya
%A HUANG Xiao-ping
%A <br>汪永威
%A 樊晓桠
%A 黄小平
%J 计算机应用研究
%D 2009
%I 
%X This paper proposed a new dynamic branch predictor based on Bi-Mode predictor and branch path history, and then implemented it by FPGA based on Longtium R2,a RISC microprocessor designed by NWPU AMEC. The proposed predictor gives good prediction accuracy for conditional branches, with small latency and low power consumption.
%K branch prediction
%K superscalar
%K branch history<br>分支预测
%K 超标量
%K 分支历史
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=A9D9BE08CDC44144BE8B5685705D3AED&aid=D072D3A9C3DA725EB1F34DBE0F7E8598&yid=DE12191FBD62783C&vid=96C778EE049EE47D&iid=0B39A22176CE99FB&sid=A4E67967A1AB25F0&eid=65C08888CCE4801E&journal_id=1001-3695&journal_name=计算机应用研究&referenced_num=0&reference_num=10