%0 Journal Article
%T Placement system research for FPGA with fast carry-chain<br>含有快速进位链的FPGA布局系统研究*
%A CUI Xiu-hai
%A YANG Hai-gang
%A LIU Yang
%A XIONG Jin
%A LIU feng
%A <br>崔秀海
%A 杨海钢
%A 刘洋
%A 熊金
%A 刘峰
%J 计算机应用研究
%D 2009
%I 
%X In order to make the FPGA placement system can process the complex circuits with fast carry chain and IP(intellectual property)cores, this paper brought forward a new FPGA placement algorithm based on simulated annealing algorithm .The algorithm could construct and use different cost functions for the circuit modules with and without fast carry chain. And in this way, the placement system could be optimized. The experimentation results show that, compared with the most representative placement system, VPR(versatile place and route), the system proposed in this paper has the function of processing fast carry chain and IP cores, and improves the performance of the placement system.
%K placement system
%K fast carry chain
%K cost function
%K simulated annealing<br>布局系统
%K 进位链
%K 评价函数
%K 模拟退火
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=A9D9BE08CDC44144BE8B5685705D3AED&aid=40A90EA922643306BD5914E35D573360&yid=DE12191FBD62783C&vid=96C778EE049EE47D&iid=59906B3B2830C2C5&sid=CBCEF6F4364C06A3&eid=8C762759BABA8FD3&journal_id=1001-3695&journal_name=计算机应用研究&referenced_num=0&reference_num=12