%0 Journal Article
%T Research of transaction level AHB bus model<br>事务级AHB总线模型研究*
%A MA Qin-sheng
%A CAO Yang
%A YANG Jun
%A ZHANG Ning
%A <br>马秦生
%A 曹阳
%A 杨珺
%A 张宁
%J 计算机应用研究
%D 2009
%I 
%X In order to deal with the limitations of the AHB bus model on the register transfer level, this paper introduced a method of modeling AHB bus using SystemC at the transaction level. The main idea of this method was that connected the mo-dules to the channels through the ports and implemented the methods in the interfaces through the channels. The experimental results revealed that the bus model is completely compliant to AMBA AHB specification. The rapidity of modeling running under the transaction level is higher than that of under the register transfer level. The time bottleneck of current hardware/software co-design method can be eased effectively. The efficiency of design SoC and the complexity of design SoC are improved. The time-to-market of chip is reduced.
%K SoC
%K AHB bus
%K transaction level
%K modeling<br>片上系统
%K AHB总线
%K 事务级
%K 建模
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=A9D9BE08CDC44144BE8B5685705D3AED&aid=32DC3D2713133F0173CA90CCBFC45BB3&yid=DE12191FBD62783C&vid=96C778EE049EE47D&iid=9CF7A0430CBB2DFD&sid=5418BFAA49702DF9&eid=E70544473EEF44FE&journal_id=1001-3695&journal_name=计算机应用研究&referenced_num=0&reference_num=24