%0 Journal Article
%T Design of Parity Check Circuits Automatic Based on Evolvable Algorithm<br>基于演化算法的奇偶校验器自动设计*
%A WANG Ping
%A ZENG San-you
%A YAN Jing-feng
%A XU Jiang-dong
%A <br>王平
%A 曾三友
%A 鄢靖丰
%A 许江东
%J 计算机应用研究
%D 2007
%I 
%X Based on evolvable algorithm,this paper proposed a new method for parity check circuit design automatically.From the analysis of a few experiments,which had improved the new method multi-objective evolution which listed is more effectively with fewer computations.This method can design a parity check circuit with fewer logic gates and less time-lapse levels automatically.
%K evolvable algorithm
%K parity check circuit
%K automatic design of circuits
%K multi-objective evolution<br>演化算法
%K 奇偶校验器
%K 电路自动设计
%K 多目标演化
%K 多目标演化算法
%K 奇偶校验器
%K 电路自动设计
%K Algorithm
%K Based
%K Automatic
%K Check
%K Parity
%K 延时
%K 逻辑门
%K 使用
%K 效率
%K 运算量
%K 验证
%K 设计思想
%K 法技术
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=A9D9BE08CDC44144BE8B5685705D3AED&aid=C793235A4E87B8F6C2DBC9E023E058A9&yid=A732AF04DDA03BB3&vid=B91E8C6D6FE990DB&iid=B31275AF3241DB2D&sid=4290346F7268639E&eid=B799C1769FCACDC8&journal_id=1001-3695&journal_name=计算机应用研究&referenced_num=0&reference_num=7