%0 Journal Article
%T Design method of IRL system based on IP core within FPGA<br>基于FPGA中IP核的IRL系统设计方法
%A YANG Guang-hui
%A WU Jiang-xing
%A <br>杨光辉
%A 邬江兴
%J 计算机应用研究
%D 2008
%I 
%X Took Virtex-4 FX-60 FPGA as an example, this paper proposed one kind of IRL system which could be remote reconfigured through TCP/IP network, then gave out the design method of hardware circuit and essential internal modules. This design of system could be reconfigured and reconstructed easily.
%K 因特网可重新配置逻辑
%K 现场可编程门阵列
%K Virtex-
%K 4
%K PPC405
%K IP资源复用
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=A9D9BE08CDC44144BE8B5685705D3AED&aid=E5DD4F701CD4B92399434C4B601FE0F1&yid=67289AFF6305E306&vid=C5154311167311FE&iid=CA4FD0336C81A37A&sid=6235172E4DDBA109&eid=3A0155B37D8FF829&journal_id=1001-3695&journal_name=计算机应用研究&referenced_num=0&reference_num=4