%0 Journal Article
%T Research of chip multiprocessor<br>单片多处理器的研究
%A SHI Li-wen
%A FAN Xiao-ya
%A ZHANG Sheng-bing
%A <br>史莉雯
%A 樊晓桠
%A 张盛兵
%J 计算机应用研究
%D 2007
%I 
%X Chip multiprocessor exploites thread-level parallelism to improve performance.This paper introduced the architec- ture of the chip multiprocessor,which included some chip multiprocessor models and commercial processors.It also did some research and analyse on key techniques.
%K chip multiprocessor
%K thread-level parallelism(TLP)
%K memory hierarchy
%K interconnection in multi-core
%K multicore task reschedule<br>单片多处理器
%K 线程级并行
%K 存储层次
%K 核间互连
%K 多核任务调度
%K 单片多处理器
%K 研究
%K multiprocessor
%K chip
%K 分析
%K 结构模型
%K 提高性能
%K 并行
%K 线程
%K 支持
%K 多处理器结构
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=A9D9BE08CDC44144BE8B5685705D3AED&aid=C793235A4E87B8F6535F5A62014EBC9D&yid=A732AF04DDA03BB3&vid=B91E8C6D6FE990DB&iid=9CF7A0430CBB2DFD&sid=D997634CFE9B6321&eid=2A3781E88AB1776F&journal_id=1001-3695&journal_name=计算机应用研究&referenced_num=0&reference_num=21