%0 Journal Article
%T Synthetic VHDL Microprocessor Core Design
VHDL语言设计可综合的微处理器内核*
%A ZHANG Kai
%A TANG Zhi-zhong
%A
张楷
%A 汤志忠
%J 计算机应用研究
%D 2004
%I
%X This paper describes a synthetic RISC architecture CPU design and implementation in detail for teaching experiment.To use structure programming method,making the instruction system architecture design,then divide the microprocessor into different function units.Write VHDL code to describle internal function and external interface of each unit.CPU core was simulated and synthesized by EDA tools after combine all units.In the end,CPU core was implemented in programmable logic device.
%K VHDL
%K CPU
%K Logic Synthesis
VHDL
%K 微处理器
%K 逻辑综合
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=A9D9BE08CDC44144BE8B5685705D3AED&aid=CE37D4E2DEFFAA42&yid=D0E58B75BFD8E51C&vid=659D3B06EBF534A7&iid=B31275AF3241DB2D&sid=AE09EACBCD1B2A13&eid=2F56B21F91C9B05B&journal_id=1001-3695&journal_name=计算机应用研究&referenced_num=3&reference_num=5