%0 Journal Article
%T A Low-Power Single-Bit Continuous-Time ¦¤¦² Converter with 92.5 dB Dynamic Range for Biomedical Applications
%A Sakkarapani Balagopal
%A Vishal Saxena
%J Journal of Low Power Electronics and Applications
%D 2012
%I MDPI AG
%R 10.3390/jlpea2030197
%X A third-order single-bit CT-¦¤¦² modulator for generic biomedical applications is implemented in a 0.15 ¦Ìm FDSOI CMOS process. The overall power efficiency is attained by employing a single-bit ¦¤¦² and a subthreshold FDSOI process. The loop-filter coefficients are determined using a systematic design centering approach by accounting for the integrator non-idealities. The single-bit CT-¦¤¦² modulator consumes 110 ¦ÌW power from a 1.5 V power supply when clocked at 6.144 MHz. The simulation results for the modulator exhibit a dynamic range of 94.4 dB and peak SNDR of 92.4 dB for 6 kHz signal bandwidth. The figure of merit (FoM) for the third-order, single-bit CT-¦¤¦² modulator is 0.271 pJ/level.
%K analog-to-digital converter (ADC)
%K continuous-time delta-sigma
%K data converter
%K oversampling
%K delta-sigma modulation
%K low-pass filter
%K low-power design
%K low-voltage design
%U http://www.mdpi.com/2079-9268/2/3/197