%0 Journal Article
%T Test Point Selection for Analog Integrated Circuit<br>模拟集成电路的测试节点选择
%A Sun Xiu-bin
%A Chen Guang-ju
%A Xie Yong-le
%A <br>孙秀斌
%A 陈光禑
%A 谢永乐
%J 电子与信息学报
%D 2004
%I 
%X How to select an optimum set of test points or test vectors has become very critical to analog integrated circuit fault diagnosis. A test point selection method based on testability measure is presented in this paper. Using Determinant Decision Diagrams (DDDs), symbolic transfer functions of circuit under test are constructed and its testability measure can be calculated exactly and efficiently. This method eliminates completely the unavoidable round-off errors introduced by numerical algorithms and can handle moderate or large integrated circuits.
%K Testability measure
%K DDDs
%K Analog integrated circuit<br>可测性测度
%K 行列式判决图
%K 模拟集成电路
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=EFC0377B03BD8D0EF4BBB548AC5F739A&aid=07B400F6CCB8AEC4&yid=D0E58B75BFD8E51C&vid=96C778EE049EE47D&iid=E158A972A605785F&sid=9107B2E171152411&eid=7C13E30F5EDBE7AB&journal_id=1009-5896&journal_name=电子与信息学报&referenced_num=6&reference_num=7