%0 Journal Article
%T Implementation of PCI Bus Multi-user Data Buffer Manager<br>PCI总线多用户数据缓冲区管理器的实现
%A Qiao Lu-feng
%A WANG Zhi-gong
%A Huang Bin
%A LU Yuan-lin
%A <br>乔庐峰
%A 王志功
%A 黄斌
%A 陆园琳
%J 电子与信息学报
%D 2005
%I 
%X The circuit structure of a kind of PCI bus multi-user data Buffer Manager (BM) is analyzed in this paper, and typical simulating waveform is presented. The method to allocate the data buffers, port bandwidth, maximum user waiting time and minimum user buffer requirements are analyzed theoretically. The expression to calculate the minimum memory needed in the BM is given. Based on the analysis, a 128-user buffer manager is realized with XILINX XCV600EPQ240 and verified in application systems.
%K VLSI<br>PCI总线
%K 先入先出存储器
%K 缓冲区管理
%K 现场可编程门阵列
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=EFC0377B03BD8D0EF4BBB548AC5F739A&aid=DC34C4CE1B3A79E3&yid=2DD7160C83D0ACED&vid=DB817633AA4F79B9&iid=DF92D298D3FF1E6E&sid=38C4598EB9061892&eid=811F346FF129CCCC&journal_id=1009-5896&journal_name=电子与信息学报&referenced_num=0&reference_num=6