%0 Journal Article
%T COMPARISON OF MODELS OF REAL DEFECT OUTLINES IN THE IC MANUFACTURING PROCESS<br>IC制造中真实缺陷轮廓模型的比较
%A Jiang Xiaohong
%A Hao Yue
%A Xu Donggang
%A Xu Guohua
%A <br>姜晓鸿
%A 郝跃
%A 许冬岗
%A 徐国华
%J 电子与信息学报
%D 1998
%I 
%X The approaches to model the real defect outlines in the IC manufacturing process are compared and some useful conclusions are obtained. The results obtained in this paper will be helpful for yield prediction and fault analysis of IC.
%K IC defect
%K Defect model
%K Fault-probability
%K Local equivalent circular defect<br>IC缺陷
%K IC缺陷模型
%K IC故障
%K 局部等效圆形缺陷
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=EFC0377B03BD8D0EF4BBB548AC5F739A&aid=14CCE920E6A5E8418EC900B7FB82CB35&yid=8CAA3A429E3EA654&vid=A04140E723CB732E&iid=0B39A22176CE99FB&sid=9F6DA927E843CD50&eid=D2742EEE6F4DF8FE&journal_id=1009-5896&journal_name=电子与信息学报&referenced_num=0&reference_num=7