%0 Journal Article
%T THE UNIFIED THEORY FOR DESIGNING AND ANALYSING BOTH SYNCHRONOUS AND ASYNCHRONOUS SEQUENTIAL CIRCUITS<br>同步和异步时序电路的统一设计和分析理论
%A Wu Xunwei
%A Chen Xiaoli
%A Jin Ou
%A <br>吴训威
%A 陈晓莉
%A 金瓯
%J 电子与信息学报
%D 1994
%I 
%X The paper discusses general expresses of the clock signal and the next state equations containing the clock signal for flip-flops, and based on it, the unified theory for designing and analysing both synchronous and asynchronous sequential circuits is proposed. The theory is proved effective by practical examples.
%K Sequential circuit
%K Clock signal
%K Logic design<br>时序电路
%K 时钟信号
%K 逻辑设计
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=EFC0377B03BD8D0EF4BBB548AC5F739A&aid=62C3735CB425EA538C4698C9AF238189&yid=3EBE383EEA0A6494&vid=7801E6FC5AE9020C&iid=E158A972A605785F&sid=683005D16807E4FE&eid=965F4E89CD0AFC30&journal_id=1009-5896&journal_name=电子与信息学报&referenced_num=0&reference_num=6