%0 Journal Article
%T A 10bit 50MS/s Pipeline ADC Design for a Million Pixels Level CMOS Image Sensor<br>用于百万像素级CMOS图像传感器的10位50MS/s流水线ADC设计
%A Zhu Tiancheng
%A Yao Suying
%A Yuan Xiaoxing
%A Li Binqiao
%A <br>朱天成
%A 姚素英
%A 袁小星
%A 李斌桥
%J 半导体学报
%D 2008
%I 
%X High speed and high accuracy ADC is a necessary part in large pixel scale CMOS image sensor. As evolution of technology, low power consumption design has attracted a lot attention. To reduce power consumption without losing performance, the same structure amplifiers are biased with the same bias circuit, and adopt cascode compensation to reduce power consumption. Noise and mismatch are more important error sources in pipeline ADC, so careful calculation and system simulation have been carried out by using Matlab in this paper. In this paper, a 10 bit 50MS/s pipeline ADC core has been presented, which can be used in large pixel scale CMOS image sensor. A balance between performance and power consumption has been achieved.
%K pipeline ADC
%K CMOS image sensor
%K noise and mismatch suppress
%K low power consumption design<br>流水线ADC
%K CMOS图像传感器
%K 噪声和不匹配抑制
%K 低功耗设计
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=BB20AE7B65D5F18D1F6E94F45EAFEA41&yid=67289AFF6305E306&vid=771469D9D58C34FF&iid=F3090AE9B60B7ED1&sid=C4B945B776D5CA8F&eid=B0718637E678B1AB&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=9