%0 Journal Article
%T Realizing High Breakdown Voltage SJ-LDMOS on Bulk Silicon Using a Partial n-Buried Layer<br>具有部分n埋层的高压SJ-LDMOS器件新结构
%A Chen Wanjun
%A Zhang Bo
%A Li Zhaoji
%A <br>陈万军
%A 张波
%A 李肇基
%J 半导体学报
%D 2007
%I 
%X A new design concept is proposed to eliminate the substrate-assisted depletion effect that significantly degrades the breakdown voltage (BV) of conventional super junction-LDMOS.The key feature of the new concept is that a partial buried layer is implemented which compensates for the charge interaction between the p-substrate and SJ region,realizing high breakdown voltage and low on-resistance.Numerical simulation results indicate that the proposed device features high breakdown voltage,low on-resistance,and reduced sensitivity to doping imbalance in the pillars.In addition,the proposed device is compatible with smart power technology.
%K super junction
%K LDMOS
%K breakdown voltage
%K substrate-assisted depletion effect<br>超级结
%K 击穿电压
%K LDMOS
%K 衬底辅助耗尽效应
%K super
%K junction
%K LDMOS
%K breakdown
%K voltage
%K substrate-assisted
%K depletion
%K effect
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=3E75EDCE3DEB3D9B&yid=A732AF04DDA03BB3&vid=D3E34374A0D77D7F&iid=38B194292C032A66&sid=26AEEED215BE97D0&eid=5DCBAAB000A70168&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=12