%0 Journal Article
%T A 14-bit 200-MS/s time-interleaved ADC with sample-time error calibration<br>一个带有采样时间误差校正的14位200MS/s时钟交织模数转换器
%A Zhang Yiwen
%A Chen Chixiao
%A Yu Bei
%A Ye Fan
%A Ren Junyan
%A <br>张逸文
%A 陈迟晓
%A 余北
%A 叶凡
%A 任俊彦
%J 半导体学报
%D 2012
%I 
%X Sample-time error between channels degrades the resolution of time-interleaved analog-to-digital converters (TIADCs). A calibration method implemented in mixed circuits with low complexity and fast convergence is proposed in this paper. The algorithm for detecting sample-time error is based on correlation and widely applied to wide-sense stationary input signals. The detected sample-time error is corrected by a voltage-controlled sampling switch. The experimental result of a 2-channel 200-MS/s 14-bit TIADC shows that the signal-to-noise and distortion ratio improves by 19.1 dB, and the spurious-free dynamic range improves by 34.6 dB for a 70.12-MHz input after calibration. The calibration convergence time is about 20000 sampling intervals.
%K sample-time error
%K analog-to-digital converter
%K correlation
%K calibration
%K time-interleaved<br>采样时间误差，模数转换器，相关性，校正，时钟交织
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=12FAD7BF88E1F42A21211CC33CA9529E&yid=99E9153A83D4CB11&vid=27746BCEEE58E9DC&iid=F3090AE9B60B7ED1&sid=67488E0338AB403C&eid=B31275AF3241DB2D&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=8