%0 Journal Article
%T In situ nanoscale refinement by highly controllable etching of the (111) silicon crystal plane and its influence on the enhanced electrical property of a silicon nanowire<br>基于硅(111)晶面腐蚀的可控在线细化工艺及其对硅纳米线电学性能的改善
%A Gong Yibin
%A Dai Pengfei
%A Gao Anran
%A Li Tie
%A Zhou Ping
%A Wang Yuelin
%A <br>龚宜彬
%A 戴鹏飞
%A 高安然
%A 李铁
%A 周萍
%A 王跃林
%J 半导体学报
%D 2011
%I 
%X Nanoscale refinement on a (100) oriented silicon-on-insulator (SOI) wafer was introduced by using tetra-methyl-ammonium hydroxide (TMAH, 25 wt%) anisotropic silicon etchant, with temperature kept at 50 ℃ to achieve precise etching of the (111) crystal plane. Specifically for a silicon nanowire (SiNW) with oxide sidewall protection, the in situ TMAH process enabled effective size reduction in both lateral (2.3 nm/min) and vertical (1.7 nm/min) dimensions. A sub-50 nm SiNW with a length of microns with uniform triangular cross-section was achieved accordingly, yielding enhanced field effect transistor (FET) characteristics in comparison with its 100 nm-wide pre-refining counterpart, which demonstrated the feasibility of this highly controllable refinement process. Detailed examination revealed that the high surface quality of the (111) plane, as well as the bulk depletion property should be the causes of this electrical enhancement, which implies the great potential of the as-made cost-effective SiNW FET device in many fields.
%K TMAH etching
%K nanofabrication
%K silicon nanowire
%K field effect transistor<br>TMAH腐蚀
%K 纳米制造
%K 硅纳米线
%K 场效应管
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=C6D3D1CB1D1B4FDF1853E46D1691A605&yid=9377ED8094509821&vid=9971A5E270697F23&iid=59906B3B2830C2C5&sid=C6C99AF60C3BEE8E&eid=94C357A881DFC066&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=10