%0 Journal Article
%T A novel high performance ESD power clamp circuit with a small area
A Novel High Performance ESD Power Clamp Circuit with Small Area
%A Yang Zhaonian
%A Liu Hongxi
%A Li Li
%A Zhuo Qingqing
%A
杨兆年
%A 刘红侠
%A 李立
%A 卓青青
%J 半导体学报
%D 2012
%I
%X A MOSFET-based electrostatic discharge (ESD) power clamp circuit with only a 10 ns RC time constant for a 0.18-μm process is proposed. A diode-connected NMOSFET is used to maintain a long delay time and save area. The special structure overcomes other shortcomings in this clamp circuit. Under fast power-up events, the gate voltage of the clamp MOSFET does not rise as quickly as under ESD events, the special structure can keep the clamp MOSFET thoroughly off. Under a falsely triggered event, the special structure can turn off the clamp MOSFET in a short time. The clamp circuit can also reject the power supply noise effectively. Simulation results show that the clamp circuit avoids fast false triggering events such as a 30 ns/1.8 V power-up, maintains a 1.2 μs delay time and a 2.14 μs turn-off time, and reduces to about 70% of the RC time constant. It is believed that the proposed clamp circuit can be widely used in high-speed integrated circuits.
%K electrostatic discharge
%K clamp circuit
%K false triggering
%K turn-off mechanism
钳位电路
%K 电源噪声
%K 占地面积
%K ESD
%K MOSFET
%K 触发事件
%K 性能
%K 时间常数
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=12438348CF4272B032D1A28945370DCB&yid=99E9153A83D4CB11&vid=27746BCEEE58E9DC&iid=9CF7A0430CBB2DFD&sid=0F3CD952B696B281&eid=DF92D298D3FF1E6E&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=14