%0 Journal Article
%T An analytical model for the drain-source breakdown voltage of RF LDMOS power transistors with a Faraday shield<br>具有法拉第屏蔽罩的射频LDMOS功率晶体管漏源击穿电压模型
%A Zhang Wenmin
%A Zhang Wei
%A Fu Jun
%A Wang Yudong
%A <br>张文敏
%A 张为
%A 付军
%A 王玉东
%J 半导体学报
%D 2012
%I 
%X An analytical model for the drain-source breakdown voltage of an RF LDMOS power transistor with a Faraday shield is derived on the basis of the solution of the 2D Poisson equation in a p-type epitaxial layer, as well as an n-type drift region by means of parabolic approximation of electrostatic potential. The model captures the influence of the p-type epitaxial layer doping concentration on the breakdown voltage, compared with the previously reported model, as well as the effect of the other device parameters. The analytical model is validated by comparing with a numerical device simulation and the measured characteristics of LDMOS transistors. Based on the model, optimization of LDMOS device parameters to achieve proper trade-off between the breakdown voltage and other characteristic parameters such as on-resistance and feedback capacitance is analyzed.
%K RF LDMOSFET
%K Faraday shield
%K breakdown voltage
%K surface electrical field
%K drift region<br>LDMOS晶体管
%K 解析模型
%K 功率晶体管
%K 法拉第屏蔽
%K 击穿电压
%K 射频
%K 二维泊松方程
%K 掺杂浓度
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=CEC329CE751EFFDA8EE5D2104D2502F7&yid=99E9153A83D4CB11&vid=27746BCEEE58E9DC&iid=E158A972A605785F&sid=34E193FF8FD7B13D&eid=B31275AF3241DB2D&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=13