%0 Journal Article
%T Design and optimization of a 2.4 GHz RF front-end with an on-chip balun<br>2.4GHz带片上非平衡变压器射频前端的设计与优化
%A Xu Hu
%A Wang Lei
%A Shi Yin
%A Dai Fa Foster
%A <br>徐化
%A 王磊
%A 石寅
%A 代伐
%J 半导体学报
%D 2011
%I 
%X In this paper, a 2.4GHz low-power, low-noise, and high linear receiver front-end with low noise amplifier (LNA) and balun optimization technique is presented. Direct conversion architecture is employed for this front-end. The on-chip balun is designed for single-to-differential conversion between the LNA and the down-conversion mixer, and is optimized for best noise performance of the front-end. The circuit is implemented with 0.35um SiGe BiCMOS technology. The front-end has three gain steps for maximization of input dynamic range. The overall maximum gain is about 36dB. The double-sideband noise figure (DSB) is 3.8dB in the high gain (HG) mode, and the input referred third-order intercept point (IIP3) is 12.5dBm in the low gain (LG) mode. The down-conversion mixer has a tunable parallel R-C load at the output and an emitter follower is used as output stage for test. The total front-end dissipates 33mw under 2.85-V supply and occupies 0.66mm2 die size.
%K front-end
%K LNA
%K balun
%K mixer
%K direct-conversion<br>射频前端
%K GHz
%K 巴伦
%K 优化
%K 低噪声放大器
%K BiCMOS技术
%K 下变频混频器
%K 设计
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=D52C2BA5472F4DEC3DB77464D5FED280&yid=9377ED8094509821&vid=9971A5E270697F23&iid=9CF7A0430CBB2DFD&sid=941EF49B8E097488&eid=B31275AF3241DB2D&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=4