%0 Journal Article
%T Two-dimensional pixel image lag simulation and optimization in a 4-T CMOS image sensor<br>四管CMOS图像传感器中像素图像拖影的二维仿真与优化
%A Yu Junting
%A Li Binqiao
%A Yu Pingping
%A Xu Jiangtao
%A Mou Cun
%A <br>于俊庭
%A 李斌桥
%A 于平平
%A 徐江涛
%A 牟村
%J 半导体学报
%D 2010
%I 
%X Pixel image lag in a 4-T CMOS image sensor is analyzed and simulated in a two-dimensional model. Strategies of reducing image lag are discussed from transfer gate channel threshold voltage doping adjustment, PPD N-type doping dose/implant tilt adjustment and transfer gate operation voltage adjustment for signal electron transfer. With the computer analysis tool ISE-TCAD, simulation results show that minimum image lag can be obtained at a pinned photodiode n-type doping dose of 7.0 × 1012 cm–2, an implant tilt of –2o, a transfer gate channel doping dose of 3.0 × 1012 cm-2 and an operation voltage of 3.4 V. The conclusions of this theoretical analysis can be a guideline for pixel design to improve the performance of 4-T CMOS image sensors.
%K image lag
%K two-dimensional simulation
%K doping dose
%K implant tilt
%K CMOS image sensor<br>图像拖影
%K 二维仿真
%K 掺杂剂量
%K 注入角度
%K CMOS图像传感器
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=4BCBE6AE57ADECCB867CC15A1DBD0C68&yid=140ECF96957D60B2&vid=4AD960B5AD2D111A&iid=9CF7A0430CBB2DFD&sid=1BDE94FEB6E92469&eid=94C357A881DFC066&journal_id=1674-4926&journal_name=半导体学报&referenced_num=3&reference_num=0