%0 Journal Article
%T An AND-LUT Based Hybrid FPGA Architecture<br>一种基于AND-LUT的混合FPGA结构
%A Chen Liguang
%A Lai Jinmei
%A Tong Jiarong
%A <br>陈利光
%A 来金梅
%A 童家榕
%J 半导体学报
%D 2007
%I 
%X A new hybrid FPGA architecture is proposed.The logic tile,which consists of a logic cluster and related connection boxes (CBs),can be configured as either programmable logic arrays (PLAs) or look-up tables (LUTs).This architecture can be classified as an AND-LUT array.PLAs are suitable for the implementation of high fan-in logic circuits,while LUTs are used to implement low fan-in logic circuits.As a result,the proposed hybrid FPGA architecture (HFA) is more flexible to improve logic density.Experiments based on MCNC benchmark circuits were performed in both the hybrid architecture and conventional LUT-based symmetrical FPGA architecture in term of area consumption.Preliminary results indicate that on average,the area is reduced by 46% using the new hybrid architecture.
%K hybrid FPGA
%K AND-LUT array
%K AND-OR array
%K PLA
%K LUT<br>混合FPGA结构
%K AND-LUT阵列
%K 与或阵列
%K 可编程逻辑阵列
%K 查询表
%K hybrid
%K FPGA
%K AND-LUT
%K array
%K AND-OR
%K array
%K PLA
%K LUT
%K 混合
%K FPGA
%K 结构
%K Architecture
%K Hybrid
%K results
%K average
%K Experiments
%K based
%K benchmark
%K conventional
%K term
%K area
%K consumption
%K flexible
%K improve
%K density
%K used
%K implementation
%K high
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=F35A01671B516A06&yid=A732AF04DDA03BB3&vid=D3E34374A0D77D7F&iid=38B194292C032A66&sid=4F0B2F798E08B761&eid=1E9426A299DC9FFD&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=6