%0 Journal Article
%T A Novel Divider Based on Dual-Bit Algorithm<br>基于双比特算法的新型除法器(英文)
%A Li Xia
%A Sun Hui
%A ZHANG QianLing
%A <br>李侠
%A 孙慧
%A 章倩苓
%J 半导体学报
%D 2004
%I 
%X A novel divider based on dual-bit algorithm and its VLSI implementation are presented.Compared with the divider of MIPS microprocessor,it decreases the average executing cycles by 52.5% while its maximum delay is almost the same and its transistor count increases by 60%.Furthermore,the simulation result indicates that the power consumption decreases to 11.3% with the same processing ability.
%K dual-bit algorithm
%K division
%K VLSI implementation
%K power consumption<br>双比特算法
%K 除法运算
%K VLSI实现
%K 功耗
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=C6EDF228728654D5&yid=D0E58B75BFD8E51C&vid=C5154311167311FE&iid=B31275AF3241DB2D&sid=9107B2E171152411&eid=7C13E30F5EDBE7AB&journal_id=1674-4926&journal_name=半导体学报&referenced_num=3&reference_num=10