%0 Journal Article
%T Design of Low Voltage Charge-Recovery Logic Circuit<br>低电压Charge-Recovery逻辑电路的设计
%A LI Xiao min
%A QIU Yu lin
%A CHEN Chao shu
%A <br>李晓民
%A 仇玉林
%A 陈潮枢
%J 半导体学报
%D 2001
%I 
%X A new Dual Swing Charge Recovery Logic (DSCRL) that is suitable for the low voltage operation is presented.DSCRL is composed of a CMOS latch type circuit and output driven transistors.The operation on output loads is a full adiabatic process.Six phase dual swing power clock is used to drive DSCRL,with the low swing power clock for the loads while the high for the CMOS latch type circuit.When our cutting down the output swing,the gate voltage of output driven transistors keep relatively high to guarantee an efficient charge recovery operation.
%K logic circuit
%K charge
%K recovery logic<br>逻辑电路
%K 电荷恢复逻辑
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=0D2A8D9CFCC6733D&yid=14E7EF987E4155E6&vid=BC12EA701C895178&iid=F3090AE9B60B7ED1&sid=B3079604173FE132&eid=37E1CFF130ACDBB2&journal_id=1674-4926&journal_name=半导体学报&referenced_num=8&reference_num=9