%0 Journal Article
%T Analysis of Redundant Integrated Circuit Yield Based on Critical Area<br>基于关键面积的冗余集成电路成品率分析
%A Zhao Tianxu
%A Duan Xuchao
%A Ma Peijun
%A Hao Yue
%A <br>赵天绪
%A 段旭朝
%A 马佩军
%A 郝跃
%J 半导体学报
%D 2003
%I 
%X Yield of the redundant circuit is analyzed with IC critical area and the computational model of this redundant circuit is given.The simulation results of an example show that the precision is higher using the presented model to predict IC yield than using the traditional yield model.
%K critical area
%K fault
%K yield
%K defect<br>关键面积
%K 故障
%K 成品率
%K 缺陷
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=E39928105F3A56FF&yid=D43C4A19B2EE3C0A&vid=B91E8C6D6FE990DB&iid=94C357A881DFC066&sid=B34BDD6A690A04C0&eid=811ACA5D3673A764&journal_id=1674-4926&journal_name=半导体学报&referenced_num=4&reference_num=8