%0 Journal Article
%T An Cascode S2I Memory Cell and Its Performance<br>共源-共栅组态S~2I电流存储单元及其性能
%A Li Yongping
%A Shi Yin
%A <br>李拥平
%A 石寅
%J 半导体学报
%D 2002
%I 
%X A new cascode S 2I memory cell (hereinafter called "CS 2I" memory cell) is presented to improve the weak points of the prototype S 2I memory cell.The speed of CS 2I memory cell increases 1.6 times than that of the prototype S 2I memory cell with the same transistor dimension.Moreover,applying the CS 2I and the S 2I cell to the systems separately,the simulation results of HSPICE indicate that accuracy for the cascode S 2I memory cell is about 5 times higher than the CS 2I in delay cell,and a third harmonic is decreased by 15dB in double sampling bilinear integrator.
%K switched-current
%K S
%K 2I memory cell
%K accuracy<br>开关电流(SI)
%K S2I存储单元
%K 精度
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=6C61D93D9BE4E508&yid=C3ACC247184A22C1&vid=EA389574707BDED3&iid=F3090AE9B60B7ED1&sid=2D52C01434B71375&eid=A6B1729CC57A879A&journal_id=1674-4926&journal_name=半导体学报&referenced_num=2&reference_num=8