%0 Journal Article
%T Efficient Interconnect Network Model for Linear Circuit Reduction<br>一种用于线性网络约简的高效互连线模型(英文)
%A Chen Bin
%A YANG Huazhong
%A Luo Rong
%A Wang Hui
%A <br>陈彬
%A 杨华中
%A 罗嵘
%A 汪蕙
%J 半导体学报
%D 2003
%I 
%X A new interconnect network model for linear netw ork reduction is presented.In this new model,the ports of the interconnect network are classified into two groups:active and passive ports.After the classification,some proprieties of the interconnect network are found to be redundant and pruned before reduction.For common interconnect networks,the scale of reduced models is smaller than 50% of the scale of previous works.
%K moment matching
%K MPVL process
%K linear circuit reduction<br>矩匹配
%K MPVL过程
%K 线性网络约简
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=E52C4EEFFCBD784B&yid=D43C4A19B2EE3C0A&vid=B91E8C6D6FE990DB&iid=9CF7A0430CBB2DFD&sid=DE4E739E935BD9A7&eid=753F7A67351FADCC&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=10