%0 Journal Article
%T SILC Mechanism in Degraded Gate Oxide of Different Thickness<br>MOSFET不同厚度薄栅老化中 SILC的机制(英文)
%A WANG Zi-ou
%A <br>王子欧
%A 卫建林
%A 毛凌锋
%A 许铭真
%A 谭长华
%J 半导体学报
%D 2001
%I 
%X It is shown that traps are generated asymmetrically in the thin gate oxides with different thickness during high field degradation,as well as the multi-mechanism plays role in the Stress Induced Leakage Current (SILC).These factors perform differently in gate oxide of different thickness.A comparison is drew between several analyzing models.Trap assisted tunneling is preferred for thinner samples,while Pool-Frankel like mechanism or thermal emission mechanism should apply to the thick ones.
%K SILC
%K gate
%K oxide<br>应力感应漏电
%K 栅氧化层
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=63D054BB0A9D7910&yid=14E7EF987E4155E6&vid=BC12EA701C895178&iid=E158A972A605785F&sid=3081401A9FAB9CE2&eid=84A93BA251D28205&journal_id=1674-4926&journal_name=半导体学报&referenced_num=1&reference_num=17