%0 Journal Article
%T On-Chip Inductor Technique for Improving LNA Performance Operating at 15 GHz
%A El-Sayed A. M. Hasaneen
%A Nagwa Okely
%J Circuits and Systems
%P 334-341
%@ 2153-1293
%D 2012
%I Scientific Research Publishing
%R 10.4236/cs.2012.34047
%X This paper presents a technique for low noise figure reduction of low-noise amplifier (LNA). The proposed LNA is designed in a source degeneration technique that offers lower noise figure. The resistance of the on-chip inductor is reduced by using multilayer that significantly reduces the thermal noise due to spiral inductor. Also, using spiral inductor as a gate inductor reduces the effect of the input parasitic capacitance on the noise figure and provides a good matching at the input and output of the LNA. The results of the LNA using multilayer on-chip inductor compared will off-chip inductor have been illustrated. It shows that the proposed technique reduces significantly the noise figure and improves the matching. The proposed LNA is designed in 0.13 ¦Ìm process with 1.3 V supply voltage and simulated using Advanced Design System (ADS) software. The simulation results show that the LNA is unconditionally stable and provides a forward gain of 11.087 dB at operating frequency of 15 GHz with 1.784 dB noise figure and input and output impedance matching of ¨C17.93 dB, and ¨C10.04 dB.
%K Low Noise Amplifier
%K On-Chip Inductor
%K Noise Figure
%K Cascade Amplifier
%K Scattering Matrix
%U http://www.scirp.org/journal/PaperInformation.aspx?PaperID=23644