%0 Journal Article
%T A New Clock-Driven ECO Placement Algorithm Based on Table-Lookup Delay Model<br>一种新的基于查找表的时钟性能驱动的增量式布局算法(英文)
%A Liu Yi
%A Hong Xianlong
%A Cai Yici
%A Wu Weimin
%A Chung-Wen Albert Tsao
%A <br>刘毅
%A 洪先龙
%A 蔡懿慈
%A 吴为民
%A Chung-Wen Albert Tsao
%J 半导体学报
%D 2002
%I 
%X A new clock-driven ECO placement algorithm is pr es ented for standard-cell layout design based on the table-lookup delay model.It considers useful clock skew information in the placement stage.It also modifies the positions of cells locally to make better preparation for the clock routing . Experimental results show that with little influence to other circuit performa nce,the algorithm can improve permissible skew range distribution evidently.
%K clock-driven
%K incremental placement
%K useful skew
%K permissibl e skew range<br>时钟驱动
%K 增量式布局
%K 有用偏差
%K 合理偏差范围
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=D83D57BA379D407A&yid=C3ACC247184A22C1&vid=EA389574707BDED3&iid=94C357A881DFC066&sid=8143FF92EEF26F96&eid=A94616C4391AA5EF&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=11