%0 Journal Article
%T CEE-Gr:A Global Router with Performance Optimization Under Multi-Constraints<br>CEE-Gr:一个在多约束下进行性能优化的总体布线器(英文)
%A Xiong Jinjun
%A He Lei
%A <br>张凌
%A 经彤
%A 洪先龙
%A 许静宇
%J 半导体学报
%D 2004
%I 
%X A global routing algorithm with performance optimization under multi constraints is proposed,which studies RLC coupling noise,timing performance,and routability simultaneously at global routing level.The algorithm is implemented and the global router is called CEE Gr.The CEE Gr is tested on MCNC benchmarks and the experimental results are promising.
%K VLSI/ULSI
%K physical design
%K global routing
%K multi
%K constraints
%K performance optimization<br>VLSI/ULSI
%K 布图设计
%K 总体布线
%K 多约束
%K 性能优化
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=CFC2E0EACBB0C605&yid=D0E58B75BFD8E51C&vid=C5154311167311FE&iid=94C357A881DFC066&sid=37F781FD8E744761&eid=F204392B3B11C3BD&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=31