%0 Journal Article
%T Low Power Design of High Speed CMOS Pulse Stream Neuron Circuit
%A CHEN Ji
%A |wei
%A SHI Bing
%A |xue
%A <br>陈继伟
%A 石秉学
%J 半导体学报
%D 2000
%I 
%X A new pulse stream neuron circuit is presented, which can be obtained in the digital CMOS process and combines both the merits of digital circuits and analog ones. The output is expressed by the frequency of the pulses with transfer characteristic, which is correspondent with the ideal sigmoid curve perfectly. Moreover, the pulse\|active strategy is introduced into the design of this CMOS pulse stream neuron circuit for the first time in order to reduce the power dissipation, which is applicable to the low\|power design of mixed\|signal circuits,too. A simple technical process and compact architecture make this circuit work at a higher speed and with lower power dissipation and smaller area.
%K artificial neural networks
%K pulse stream
%K pulse\|active strategy
%K CMOS
%K low power<br>CMOS
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=61D32FFF5BF36F0E&yid=9806D0D4EAA9BED3&vid=659D3B06EBF534A7&iid=708DD6B15D2464E8&sid=941A3E905B9F2AD9&eid=305A58D956DD6BAF&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=7