%0 Journal Article
%T A 2.5Gb/s GaAs MESFET Clock Recovery and Decision Circuit<br>2.5Gb/s Ga As MESFET定时判决电路(英文)
%A ZHAN Yan
%A XIA Guan qun
%A WANG Yong sheng
%A ZHAO Jian long
%A ZHU Chao song
%A <br>詹琰
%A 夏冠群
%A 王永生
%A 赵建龙
%A 朱朝嵩
%J 半导体学报
%D 2001
%I 
%X A 2 5Gb/s depletion mode GaAs MESFET clock recovery and decision circuit is described,which applies to the optical fiber communication.The circuit consists of a clock recovery circuit,including a preprocessor,phase detector(PD),low pass filter(LPF) and voltage controlled oscillator(VCO) and a decision circuit,including a comparator and a latch.The SPICE simulation result confirms the high frequency 2 5GHz of the clock recovery and the high speed 2 5Gb/s of the decision circuit.The 2 5Gb/s decision circuit has proved to be able to deal with the input signal and produce a digital output signal after it being sampled by a clock signal.
%K GaAs
%K MESFET
%K clock recovery
%K decision<br>GaAs
%K MESFET
%K 时钟恢复
%K 判决
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=3678B30219DF356B&yid=14E7EF987E4155E6&vid=BC12EA701C895178&iid=DF92D298D3FF1E6E&sid=ABE2D40B2765724E&eid=7C8C2BAFC9BA0571&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=8