%0 Journal Article
%T A CMOS High-Speed Dual-Modulus Prescaler with New Filp-Flop<br>一种采用新触发器的高速CMOS前置分频器
%A 张春晖
%A 李永明
%A 陈弘毅
%J 半导体学报
%D 2001
%I 
%X In PLL design,Dual-Modulus Prescaler (DMP) is one of the bottlenecks in achieving a higher operation speed.To raise the speed,faster technologies or better designs are desirable.Actually,there exists a gap between the practical results and analytic results obtained by using the conventional method.A new analytic method is proposed to resolve this problem,which combines the digital and analog viewpoints.New D-FF and L-FF are such methods and the DMP formed with these flip-flops can raise the frequency greatly.
%K phase-locked loop
%K DMP
%K feature size<br>锁相环
%K DMP
%K 特征尺寸
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=ACCE8EBD6121198F&yid=14E7EF987E4155E6&vid=BC12EA701C895178&iid=B31275AF3241DB2D&sid=E339BF74025BB291&eid=4198A31627C9B2A6&journal_id=1674-4926&journal_name=半导体学报&referenced_num=2&reference_num=8