%0 Journal Article
%T An On-Line Incremental Design Rule Checker in GEDS<br>GEDS中的联机增量式设计规则检查及其实现
%A Ying Changsheng/
%A <br>应昌胜
%A 洪先龙
%A 王尔乾
%J 半导体学报
%D 1991
%I 
%X A new technique of on-line incremental design rule checking "IDRC" is presented.Itchecks violations of the design rules in accompany with the interactive mask layout design andreports the errors immediately whenever they are detected. We have embedded an IDRC routineinto a layout editor named GEDS. The algorithms for basic operations of design rule check-ing are described. The scheme for the hierarchically constructed layout design is also discus-sed.
%K Design rule checking
%K Layout design
%K CAD<br>CAD
%K 集成电路
%K 版图设计
%K 规则检查
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=A618F303A019B0A7&yid=116CB34717B0B183&vid=59906B3B2830C2C5&iid=0B39A22176CE99FB&sid=6270DC1B5693DDAF&eid=A63576421B012172&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=1