%0 Journal Article
%T A Design for Built-in Testability of DC-DC Converter Chip<br>一种DC-DC芯片内建可测性设计
%A Wang Hongyi
%A Lai Xinquan
%A Li Yushan
%A Chen Fuji
%A <br>王红义
%A 来新泉
%A 李玉山
%A 陈富吉
%J 半导体学报
%D 2005
%I 
%X A design method for the testability of DC-DC is presented.Only a small portion of additional test circuits are added in this type of IC;most of the internal parameters can be measured through the limited pins of the DC-DC.
%K power management
%K DC-DC
%K design for testability
%K built-in test circuit<br>电源管理
%K DC-DC
%K 可测性设计
%K 内建测试电路
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=4C8B463BF961D9D1&yid=2DD7160C83D0ACED&vid=96C778EE049EE47D&iid=9CF7A0430CBB2DFD&sid=47AB527E821B9862&eid=CE651EF760BCA96C&journal_id=1674-4926&journal_name=半导体学报&referenced_num=2&reference_num=8