%0 Journal Article
%T Impact of Device Architecture on Performance and Reliability of Deep Submicron SOI MOSFETs (invited paper)<br>Impactof Device Architecture on Performance and Reliability of Deep Submicron SOI MOSFETs( invited paper)
%A FBalestra
%A <br>F.Balestra
%J 半导体学报
%D 2000
%I 
%X The main electrical properties of advanced Silicon On Insulator MOSFETs are addressed. The subthreshold and high field operations are analysed as a function of device architecture. The special SOI parasitic phenomena, such as the floating body potential and temperature, are critically reviewed. The main limitations of submicron MOSFET are comparatively evaluated for various SOI structures. Short channel and hot carrier effects as well as the reliability of the SOI technology are investigated for gate length down to sub\|0 1 micron.
%K MOSFET
%K SOI
%K deep submicron
%K performance
%K reliability<br>MOSFETs
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=8582C139C861C359&yid=9806D0D4EAA9BED3&vid=659D3B06EBF534A7&iid=F3090AE9B60B7ED1&sid=AB8B0EE7E1A96CB2&eid=F5956B5D26BCB2A8&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=6