%0 Journal Article
%T Design of CCSDS image compression system based on FPGA<br>基于FPGA的CCSDS图像数据压缩系统的设计
%A CHEN Zhe
%A TU Guo-Fang
%A ZHANG Can
%A CHEN De-Yuan
%A <br>陈哲
%A 涂国防
%A 张灿
%A 陈德元
%J 中国科学院研究生院学报
%D 2011
%I 
%X We report the design and implementation of CCSDS image data compression (IDC) parallel scheme based on FPGA. This scheme includes four modules: discrete wavelet transform(DWT), direct coefficient quantified encoding, bit plane encoding(BPE),and code processing. In order to put on speed, we use the parallel scanning and parallel encoding in the BPE module. The experimental results show the feasibility and efficiency of this scheme, and compared to the modified method of CCSDS IDC serial encoding, the processing time has reduced by 13.6%. Our scheme is fit for image data compression in the space communication.
%K CCSDS
%K image compression
%K bit plane encoding
%K FPGA<br>CCSDS
%K 图像压缩编码
%K 并行编码
%K FPGA
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=B5EDD921F3D863E289B22F36E70174A7007B5F5E43D63598017D41BB67247657&cid=B47B31F6349F979B&jid=67CDFDECD959936E166E0F72DE972847&aid=4B1F3F54E1ABCF0CA28360521BC69C36&yid=9377ED8094509821&vid=D3E34374A0D77D7F&iid=CA4FD0336C81A37A&sid=74011071555EB4E5&eid=D767283A3B658885&journal_id=1002-1175&journal_name=中国科学院研究生院学报&referenced_num=0&reference_num=11