%0 Journal Article
%T Interpolation-based anti-jamming E-D-gate DS-SS code tracking architecture<br>抗干扰插值迟早门扩频跟踪构架
%A TIAN Yu
%A LI Guo-Tong
%A YANG Gen-Qing
%A <br>田宇
%A 李国通
%A 杨根庆
%J 中国科学院研究生院学报
%D 2009
%I 
%X DS-SS is widely used in LEO satellite communication. Since jamming exists in UHF/VHF wave band, which is commonly selected by LEO communication system, anti-jamming module is necessary in receivers. To control the power consuming, an interpolation-based one-sample-per-chip receiver architecture is developed. Performance analyses show that this architecture cuts off half of anti-jamming module computation burden at the cost of the SNR lose less than 0.1dB. By this approach, computation burden and power consuming can be reduced remarkably.
%K interpolation
%K E-D-gate
%K anti-jamming
%K low-power-consuming<br>插值
%K 迟早门
%K 抗干扰
%K 低功耗
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=B5EDD921F3D863E289B22F36E70174A7007B5F5E43D63598017D41BB67247657&cid=B47B31F6349F979B&jid=67CDFDECD959936E166E0F72DE972847&aid=D4FE3CB5DB2A9051285BE3A47DF99CFD&yid=DE12191FBD62783C&vid=96C778EE049EE47D&iid=E158A972A605785F&sid=F9A6B6F259CE5121&eid=AF0641F74554D706&journal_id=1002-1175&journal_name=中国科学院研究生院学报&referenced_num=1&reference_num=5