%0 Journal Article
%T Implementation of radar monitoring and controlling system based on the SOPC of NiosII CPU<br>基于NiosII片上可编程系统(SOPC)实现的雷达监控系统
%A XIE Dong-Hui
%A QI Wei-Min
%A <br>谢东辉
%A 齐伟民
%J 中国科学院研究生院学报
%D 2010
%I 
%X This study presents a radar monitoring and controlling system which is mainly based on the NiosII CPU and introduces the hardware integration and software design flow of the system on programmable chip. The kernel of design is Cyclone II family FPGA which supports the 32 bits high performance NiosII CPU, and application software is developed in NiosII IDE environment tool. Compared with the traditional monitoring and controlling system, the present design has capabilities of fast data transmitting, low power consumming, and high integration.
%K radar monitoring and controlling system
%K system on programmable chip ( SOPC )
%K FPGA<br>雷达监控系统
%K 可编程片上系统
%K NiosⅡ处理器
%K 现场可编程门阵列
%K NiosⅡ
%K CPU
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=B5EDD921F3D863E289B22F36E70174A7007B5F5E43D63598017D41BB67247657&cid=B47B31F6349F979B&jid=67CDFDECD959936E166E0F72DE972847&aid=795ED2F8EAB468BC20F20684FB234CD8&yid=140ECF96957D60B2&vid=DB817633AA4F79B9&iid=CA4FD0336C81A37A&sid=E84BBBDDD74F497C&eid=CB423C9A71560A74&journal_id=1002-1175&journal_name=中国科学院研究生院学报&referenced_num=0&reference_num=5