%0 Journal Article
%T A compact model of substrate resistance for deep sub-micron gate grounded NMOS electrostatic discharge protection device<br>基于深亚微米工艺的栅接地NMOS静电放电保护器件衬底电阻模型研究
%A Wu Xiao-Peng
%A Yang Yin-Tang
%A Gao Hai-Xia
%A Dong Gang
%A Chai Chang-Chun
%A <br>吴晓鹏
%A 杨银堂
%A 高海霞
%A 董刚
%A 柴常春
%J 物理学报
%D 2013
%I 
%X The current controlled voltage source model of substrate parasitic resistance of deep sub-micron electrostatic discharge protection device is optimized by considering the effect of conductance modulation. A compact macro-model of substrate resistance is presented according to the characteristics of lightly doped bulk substrate and heavily doped substrate with a lightly doped epitaxial layer, which is scalable with the layout dimension. The experimental model parameters of devices with various spaces between source and substrate diffusion can be extracted by device simulation. The breakdown behavior of gate grounded negative-channel metal oxide semiconductor shows the effectiveness of this method. In the meantime, the simulation time-consuming of the compact model is only 7% that of the device simulation software.
%K gate grounded negative channel metal oxide semiconductor
%K electrostatic discharge
%K substrate resistance model<br>栅接地n型金属氧化物半导体器件
%K 静电放电
%K 衬底电阻模型
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=6E709DC38FA1D09A4B578DD0906875B5B44D4D294832BB8E&cid=47EA7CFDDEBB28E0&jid=29DF2CB55EF687E7EFA80DFD4B978260&aid=530695581BF85784D8C4204A4C9006CF&yid=FF7AA908D58E97FA&iid=E158A972A605785F&journal_id=1000-3290&journal_name=物理学报&referenced_num=0&reference_num=0