%0 Journal Article
%T Numerical Study on a Lateral Double-Gate Tunnelling Field Effect Transistor
%A HE Jin
%A BIAN Wei
%A TAO Ya-Dong
%A LIU Feng
%A SONG Yan
%A ZHANG Xing
%A <br>何进
%A 边伟
%A 陶亚东
%A 刘峰
%A 宋岩
%A 张兴
%J 中国物理快报
%D 2006
%I 
%X A novel lateral double-gate tunnelling field effect transistor (DG-TFET) is studied and its performance is presented by a two-dimensional device simulation with code ISE. The result demonstrates that this new tunnelling transistor allows for the steeper sub-threshold swing below 60 mV/dec, the super low supply voltage (operable at VDD<0.3 V) and the rail-to-rail logic (significant on-state current at the drain-source voltage VDS=50 mV) for the aggressive technology assumptions of the availability of high-k/metal stack with equivalent gate oxide thickness EOT=0.24 nm and the work function difference 4.5 eV of materials.
%K 85
%K 30
%K Mn
%K 85
%K 30
%K Tv
%K 85
%K 30
%K -p<br>侧向多门
%K 穿隧式场效应晶体管
%K 数值模拟
%K 输出特性
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=6E709DC38FA1D09A4B578DD0906875B5B44D4D294832BB8E&cid=47EA7CFDDEBB28E0&jid=E27DA92E19FE279A273627875A70D74D&aid=5479CBC15818A6DE5A0349030BCC0834&yid=37904DC365DD7266&vid=EA389574707BDED3&iid=59906B3B2830C2C5&sid=F4EE50112CFACFD6&eid=9F5513BCB1BF5DFF&journal_id=0256-307X&journal_name=中国物理快报&referenced_num=0&reference_num=14