%0 Journal Article
%T A low power automatic gain control loop for a receiver<br>一种用于接收机的低功耗自动增益控制环路
%A Li Guofeng
%A Geng Zhiqing
%A Wu Nanjian
%A <br>李国锋
%A 耿志卿
%A 吴南健
%J 半导体学报
%D 2010
%I 
%X This paper proposes a new structure to lower the power consumption of a variable gain amplifier (VGA) and keep the linearity of the VGA unchanged. The structure is used in a high rate amplitude-shift keying (ASK) based IF-stage. It includes an automatic gain control (AGC) loop and ASK demodulator. The AGC mainly consists of six-stage VGAs. The IF-stage is realized in 0.18 μ m CMOS technology. The measurement results show that the power consumption of the whole system is very low. The system consumes 730 μ A while operating at 1.8 V. The minimum ASK signal the system could detect is 0.7 mV (peak to peak amplitude).
%K low power
%K linearity
%K variable gain amplifier
%K automatic gain control loop
%K amplitude-shift keying<br>低功耗
%K 线性度
%K 可变增益放大器
%K 自动增益控制环路
%K 幅移键控
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=1319827C0C74AAE8D654BEA21B7F54D3&jid=025C8057C4D37C4BA0041DC7DE7C758F&aid=2EF62EE1A1F649D55ECD37CC0E5D8EB5&yid=140ECF96957D60B2&vid=4AD960B5AD2D111A&iid=9CF7A0430CBB2DFD&sid=85DC1A3005B892E6&eid=94C357A881DFC066&journal_id=1674-4926&journal_name=半导体学报&referenced_num=0&reference_num=0