%0 Journal Article
%T A Multi-Layer Perceptron SoC for Smart Devices
%J Computer Science and Engineering
%@ 2163-1492
%D 2012
%I 
%R 10.5923/j.computer.20120207.02
%X This paper presents a programmable System-On-a-chip for various embedded applications that need Neural Network computations. The system is fully implemented into Field-Programmable Gate Array (FPGA) based prototyping platform. The SoC consists of an embedded processor core and a reconfigurable hardware accelerator for neural computations. The performance of the SoC is evaluated using real image processing applications, such as optical character recognition (OCR) system.
%K SoC
%K FPGA
%K MLP
%K Hardware Accelerator
%U http://article.sapub.org/10.5923.j.computer.20120207.02.html