%0 Journal Article
%T Efficient implementation of 90กใ phase shifter in FPGA
%A Duraiswamy Punithavathi
%A Bauwelinck Johan
%A Vandewege Jan
%J EURASIP Journal on Advances in Signal Processing
%D 2011
%I Springer
%X In this article, we present an efficient way of implementing 90กใ phase shifter using Hilbert transformer with canonic signed digit (CSD) coefficients in FPGA. It is implemented using 27-tap symmetric finite impulse response (FIR) filter. Representing the filter coefficients by CSD eliminates the need for multipliers and the filter is implemented using shifters and adders/subtractors. The simulated results for the frequency response of the Hilbert transformer with infinite precision coefficients and CSD coefficients agree with each other. The proposed architecture requires less hardware as one adder is saved for the realization of every negative coefficient compared to convectional CSD FIR filter implementation. Also, it offers a high accuracy of phase shift.
%U http://asp.eurasipjournals.com/content/2011/1/32