%0 Journal Article
%T Low-Voltage MOS Current Mode Logic Multiplexer
%A K. Gupta
%A N. Pandey
%A M. Gupta
%J Radioengineering
%D 2013
%I Spolecnost pro radioelektronicke inzenyrstvi
%X In this paper, a new low-voltage MOS current mode logic (MCML) multiplexer based on the triple-tail cell concept is proposed. An analytical model for static parameters is formulated and is applied to develop a design approach for the proposed low-voltage MCML multiplexer. The delay of the proposed low-voltage MCML multiplexer is expressed in terms of the bias current and the voltage swing so that it can be traded off with the power consumption. The proposed low-voltage MCML multiplexer is analyzed for the three design cases namely high-speed, power-efficient, and low-power. Finally, a comparison in performance of the proposed low-voltage MCML multiplexer with the traditional MCML multiplexer is carried out for all the cases.
%K MOS current mode logic
%K low-voltage
%K triple-tail cell
%U www.radioeng.cz/fulltexts/2013/13_01_0259_0268.pdf